From: Ian Campbell Date: Wed, 1 Jun 2011 15:40:54 +0000 (+0100) Subject: hvmloader: enable PCI_COMMAND_IO on primary VGA device X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~10256 X-Git-Url: https://dgit.raspbian.org/%22http:/www.example.com/cgi/%22https:/%22bookmarks://%22Dat/%22http:/www.example.com/cgi/%22https:/%22bookmarks:/%22Dat?a=commitdiff_plain;h=50504b4272ff9f4ecc3a8fb9d797932484056998;p=xen.git hvmloader: enable PCI_COMMAND_IO on primary VGA device There is an implicit assumption in the PCI spec that the primary VGA device (e.g. something with class==VGA) will have I/O enabled in order to make the standard VGA I/O registers (e.g. at 0x3xx) available, even though the device has no explicit I/O BARS. The qemu device model for the Cirrus VGA card does not actually enforce this but SeaBIOS looks for a VGA device with I/O enabled before running the VGA ROM. Coreboot has similar behaviour and I verified on a physical Cirrus GD 5446 that the BIOS had enable I/O cycles. The thread at http://www.seabios.org/pipermail/seabios/2011-May/001804.html contains more info. Signed-off-by: Ian Campbell --- diff --git a/tools/firmware/hvmloader/rombios.c b/tools/firmware/hvmloader/rombios.c index f85ff79fc7..60945601e4 100644 --- a/tools/firmware/hvmloader/rombios.c +++ b/tools/firmware/hvmloader/rombios.c @@ -102,6 +102,7 @@ static void rombios_apic_setup(void) static void rombios_pci_setup(void) { uint32_t base, devfn, bar_reg, bar_data, bar_sz, cmd, mmio_total = 0; + uint32_t vga_devfn = 256; uint16_t class, vendor_id, device_id; unsigned int bar, pin, link, isa_irq; @@ -146,12 +147,22 @@ static void rombios_pci_setup(void) { case 0x0300: /* If emulated VGA is found, preserve it as primary VGA. */ + if ( virtual_vga == VGA_none ) if ( (vendor_id == 0x1234) && (device_id == 0x1111) ) + { + vga_devfn = devfn; virtual_vga = VGA_std; + } else if ( (vendor_id == 0x1013) && (device_id == 0xb8) ) + { + vga_devfn = devfn; virtual_vga = VGA_cirrus; + } else if ( virtual_vga == VGA_none ) + { + vga_devfn = devfn; virtual_vga = VGA_pt; + } break; case 0x0680: /* PIIX4 ACPI PM. Special device with special PCI config space. */ @@ -307,6 +318,18 @@ static void rombios_pci_setup(void) cmd |= PCI_COMMAND_IO; pci_writew(devfn, PCI_COMMAND, cmd); } + + if ( vga_devfn != 256 ) + { + /* + * VGA registers live in I/O space so ensure that primary VGA + * has IO enabled, even if there is no I/O BAR on that + * particular device. + */ + cmd = pci_readw(vga_devfn, PCI_COMMAND); + cmd |= PCI_COMMAND_IO; + pci_writew(vga_devfn, PCI_COMMAND, cmd); + } } /*